Abstract:
The HL-LHC experiment will face two main challenges: high radiation due to increased high integrated luminosity and large amount of data resulting from high instantaneous luminosity. To overcome these two challenges, CMS plans to make many updates to its detector, such as replacing the calorimeter with high granular ity calorimeter. The new calorimeter uses newly developed technologies for both the front-end and back-end electronics part of the data read-out electronics. The design of these parts is based on high-bandwidth data transmission via optical links and FPGA technology. A lot of studies are required to establish an efficient and long-lasting data collection performance of the detector. One of them is the optimization of link connections of the hardware on the back- end electronics and the other is integrated bit error rate tests on the FPGAs. In this thesis, first, optimization of link connection stud ies, methodology and tools used for those studies are explained and then integrated bit error rate test by introducing and explaining hardware and software used for data transmission at back end electronics of the new calorimeter.
