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Design of negative group delay circuits with MOS-only applications

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dc.contributor Graduate Program in Electrical and Electronic Engineering.
dc.contributor.advisor Çiçekoğlu, Oğuzhan. Baloğlu, Onat. 2023-10-15T07:18:16Z 2023-10-15T07:18:16Z 2022
dc.identifier.other EE 2022 B35
dc.description.abstract Physical size, design flexibility, noise, signal attenuation, and distortion are a few of the issues that arise in the design of analog electrical circuits. Additionally, a major difficulty with electronic systems is their time delay, particularly when high order filters are present. The literature, especially in the last 10 years, provides a variety of applications for negative group delay (NGD) implemented with electronic circuits as well as mathematical models to address that issue. The signal amplification and the group delay linearity are the major design parameters for the NGD that is employed to achieve low distortion at the output. A flexible NGD design and the operation range of the NGD circuit is additionally required to expand the application area. In this thesis, active NGD circuits based on MOSFETs to decrease the physical size of the design using Current Feedback Operational Amplifier (CFOA), Operational Transconductance Amplifier (OTA-C) based voltage mode and transimpedance-mode NGD circuits have been designed. Moreover, a mathematical approach to design such analog electronic circuits have been demonstrated. The relation of the NGD frequency operation range and NGD value is presented and example designs are demonstrated using well-defined parameters. Along with the calculations and simulation results, an experimental verification is presented in a lab setting. The findings demonstrate that a time advance is possible in a specific frequency range without a direct dependence on the system gain value.
dc.publisher Thesis (M.S.) - Bogazici University. Institute for Graduate Studies in Science and Engineering, 2022.
dc.subject.lcsh Metal oxide semiconductors.
dc.title Design of negative group delay circuits with MOS-only applications
dc.format.pages xv, 75 leaves

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