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Dijital Arşivi

High level power efficient synthesis of FIR based digital systems

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dc.contributor Ph.D. Program in Electrical and Electronic Engineering.
dc.contributor.advisor Dündar, Günhan,
dc.contributor.author Aktan, Mustafa.
dc.date.accessioned 2023-03-16T10:25:01Z
dc.date.available 2023-03-16T10:25:01Z
dc.date.issued 2008.
dc.identifier.other EE 2008 A38 PhD
dc.identifier.uri http://digitalarchive.boun.edu.tr/handle/123456789/13085
dc.description.abstract Digital filters are the most frequently used elements in signal processing applications. Among digital filters, FIR filters are preferred due to their stability, easily achievable linear-phase property, and low quantization wordlength sensitivity. All these desirable properties come with a drawback: increased computational workload. This, in turn, leads to excessive amount of power dissipation which is a bottleneck for today’s low power demanding applications. In this work, a low-power design methodology for the design of FIR filters is proposed. The methodology is implemented in a software tool where the user gives only the characteristics of the FIR filter. The tool generates the power optimized circuit/coefficient set depending on the type of realization of the filter: parallel/sequential. For the parallel realization using constant coefficients, power is related to the number of nonzero digits in the binary notation of the filter coefficients. On the other hand, the sequential realization of FIR filters is done on programmable processors where coefficients are successively applied to the inputs of a multiply accumulate unit. Hence, switching activity between successively applied coefficients is important for low power design. In this context, a novel algorithm for the design of low-power and hardware efficient linearphase FIR filters is proposed which is the main contribution of this work. The algorithm finds filter coefficients with reduced complexity (number of ones in coefficients, switching activity between coefficients) given the filter frequency response characteristics. Although the worst case run time of the algorithm is exponential, its capability to find appreciably good solutions in a reasonable amount of time makes it a desirable CAD tool for designing low-power and hardware efficient FIR filters. The superiority of the algorithm on existing methods in terms of design time, hardware complexity, and power performance is shown with several design examples for both parallel and sequential realizations of FIR filters.
dc.format.extent 30cm.
dc.publisher Thesis (Ph.D.)-Bogazici University. Institute for Graduate Studies in Science and Engineering, 2008.
dc.relation Includes appendices.
dc.relation Includes appendices.
dc.subject.lcsh Signal processing -- Digital techniques.
dc.subject.lcsh Electric filters, Digital.
dc.title High level power efficient synthesis of FIR based digital systems
dc.format.pages xiv, 99 leaves;


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